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picor corporation ? picorpower.com pi2061 rev 1.4 page 1 of 16 ? pi2061 cool - switch ? series high side high voltage load disconnect switch controller ic description the pi2061 is a high-speed electronic circuit breaker controller ic designed for use with n-channel mosfets in high side load disconnect switch solutions for medium voltage applications. the pi2061 cool-switch? controller enables an extremely low power loss solution with fast dynamic response to an over current fault or en low conditions. once enabled, the pi2061 monitors the mos fet current through a sense resistor. if an over current level is sensed, the switch is quickly latched off to prevent the power source from being overloaded. bringing the en pin low will reset the over current latch allowing retry. to avoid false tripping by the in-rush current, the over current level is approximately doubled during start up, until sn approaches about 0.8v below vc. the pi2061 has an internal charge pump to drive the gate of a high side n-channel mosfet above the vc input. there is an internal shunt regulator that regulates the vc input with respect to the sgnd pin for applications higher than 11 volts. features ? programmable latching over-current detection ? fast 120ns disconnect response to a load short ? fast disable via en pin, typically 200ns. ? 4a gate discharge current ? internal charge pump ? fault status indication applications ? telecom system, 80v operation & 100v/100ms transient ? n+1 redundant power systems ? servers & high end computing ? high side circuit breaker and load disconnect package information the pi2061 is offered in the following package: ? 10 lead 3mm x 3mm dfn package table of conten ts : ? ? ? ? ? ? ? ? ? ? ? ? typical application: figure 1 : pi2061 in high side disconnect switch application figure 2 : pi20 61 response time to output short fault condition not recommended for new designs vin pgnd sn sgnd pi2061 1 7 0.1f 4 9 ft en 5 rtn vc 3 load r pg ft vc vout iout d1 r vc gate 6 2 sp r s d2 event: output short vin vout 120ns over current detection mosfet turn off time 0a 0v normal operation output current current trip level
? picor corporation ? picorpower.com pi2061 rev 1.4 page 2 of 16 pin description pin name pin number description pgnd 1 gate driver switch return: this pin is the high current return path for the gate driver turn off switch. connect this pin to the low side of vc bypass capacitor and sgnd. gate 2 gate drive output: this pin drives the gate of the external n - chann el mosfet. under normal operating conditions, the gate pin pulls high to approximately 2*vc with respect to sgnd pin. the controller turns the gate off during an over - current fault that is above the overcurrent volt age threshold (166mv during power up and 70 mv in steady state). vc 3 controller input supply: this pin is the supply pin for the control circuitry and gate driver. connect a 0. 1f capacitor between the vc pin and the sgnd pin. voltage on this pin is regulated to 11.7v with respect to sgnd b y an internal shunt regulator. c onnect a bias resistor (r vc ) between the vc pin and the supply input as shown in figure 1 . sgnd 4 vc return: this pin is the return (ground) for the control circuitry. connect this pin to the low side of the vc bypass capacitor and high side of the r pg resistor as shown in figure 1 . en 5 enable: p ull this pin low with 8a or more to disable the gate driver and reset the latch. tie this pin to v c if the enable/disable feature is not used. sp 6 positive sense input & clamp: connect sp pin to the positive side of the sense resistor. the magnitude of the voltage difference between sp and sn provides an indication of the current through the sense resistor. sn 7 negative sense input & clamp: connect sn pin to the negative side of the sense resistor. the magnitude of the voltage difference between sp and sn provides an indication of the load current through the sense resistor. nc 8 , 10 no connect: leave pins un connect ed ft 9 fault status output: this open collector pin transition s to high resistance to indicate a fault . when the controller input voltage is in under voltage, vc - sgnd < 7v this pin is high resistance as well. when the part is in a normal operating condition and gate driver is enabled this pin is low res istance. package pin - outs 10 lead dfn (3mm x 3mm) top view not recommended for new designs 1 2 3 4 5 10 9 8 7 6 gate vc nc pgnd en sgnd sn nc ft sp
? picor corporation ? picorpower.com pi2061 rev 1.4 page 3 of 16 absolute maximum ratings note: all voltage nodes are referenced to sgnd vc - 0.3v to 17.3v / 40ma sp, sn, ft , en - 0.3v to 17.3v / 10ma gate - 0.3v to 24v / 5a peak pgnd - 0.3v to 3v / 5a peak sgnd 40ma storage temperature - 65 o c to 150 o c operating junction temperature - 40 o c to 140c soldering temperature for 20 seconds 260 c esd rating 2kv hbm electrical specifications unless otherwise specified: - 40 ? c < t j < 125 ? c, vc=en=10.5v, c vc =0.1uf , c gate_pgnd =1nf, sgnd=pgnd parameter symb ol min typ max units conditions vc supply operating supply range v vc - sgnd 8.5 10.5 v no vc limiting resistor quiescent current i vc 1.7 2.1 ma vc = 10.5v, sp=sn=vc quiescent current start up i vcsu 2.0 2.5 3.0 ma vc = 8.5v, sp=sn=sgnd vc clamp voltage v vc - clm 11 11.7 12.5 v i vc =3ma vc clamp series resistance r vc 10 ? vc =10ma vc under - voltage rising threshold v vcuvr 6.2 7. 32 8.5 v vc under - voltage falling threshold v vcuvf 6 7.00 7.9 v vc under - voltage hysteresis v vcuv - hs 240 320 400 mv differential amplifier and comparators common mode input voltage v cm v sgnd v vc +0.3 v differential operating input voltage (1) v sp - sn 25 0 mv sp - sn sp input bias current i sp 15 25 35 a sn 25 37 50 a bst forward voltage v dbst 0.87 1.0 v i sn =3ma low range overcurrent threshold v oc - thl 63 70 77 mv vc - sn=0v low range overcurrent turn - off time t oc - off 120 200 ns v sp - sn = 0 v to 200mv step to 90% of vg max, sn=vc high range overcurrent threshold v oc - thh 133 166 200 mv vc - sn=6v overcurrent hysteresis (1) v oc - hy 9 13 17 mv not recommended for new designs
? picor corporation ? picorpower.com pi2061 rev 1.4 page 4 of 16 electrical specifications unless otherwise specified: - 40 ? c < t j < 125 ? c, vc=en=10.5v, c vc =0.1uf , c gate_pgnd =1nf, sgnd=pgnd parameter symbol min typ max units conditions differential amplifier and comparators (continued) over current range switch over threshold v soth 0.5 0.8 1 v vc - sn over current range switch over delay (1) : low to high t hreshold t sol2h 100 170 300 ns vc - sn= - 0.7v~1.7v over current range switch over delay (1) : high to low threshold t soh2l 80 125 190 ns sn - vc= - 1.7v~0.7v gate driver gate source current i g - sc - 15 - 10 a v g =v g - hi - 1, i vc =3ma pull down peak current to pgnd (1) i g - pd 1.5 4.0 a pull - down gate resistance to pgnd (1) r g - pd 0.3 ? g = 1.5v @ 25 ? (1) v g - pgnd 0.2 v dc gate pull - down voltage v g - sgnd 0.8 1.2 v i g =100ma, in oc fault gate drive voltage to vc v g - hi 7.0 8.0 11 v i g =10a, i vc =3ma 8.0 9.0 11 v i g =2a, i vc =3ma gate fall time t g - f 10 25 ns 90% to 10% of v g max. gate voltage @ vc=4.5v v g - uvlo 0.7 1 v i g =10a, sp= sn=open enable (en) en threshold voltage to vc pin v vc_e n 0.70 1.35 1.80 v disable pull down current i dis 8 15 22 a fault status: ft ft output low voltage v ft 0.2 0.5 v i f t =200a, vc>8.5v ft output high leakage current i ft 10 a ft =14v ft delay time t ft - dly 2.5 5.5 12 s v sp - sn = 0~200mv step to 10% of v ft max, sn=vc note 1 : these parameters are not production tested but are guaranteed by design, characterization, and correlation with statistical process control. note 2: current sourced by a pin is reported with a negative sign. not recommended for new designs
? picor corporation ? picorpower.com pi2061 rev 1.4 page 5 of 16 functional description: the pi2061 cool-switch is designed to drive an n-channel mosfet in a high side circuit breaker application. as shown in figure 1 , the load current is sensed through the sense resistor (rs). at power up the controller has a high er threshold voltage compared to steady state operation to allow capacitive load charging without nuisance tripping of the breaker. differential amplifier: the pi2061 integrates a high-speed fixed offset voltage differential amplifier to sense the difference between the sense positive (sp) pin and sense negative (sn) pin voltage with high accuracy. the amplifier output is connected to the control logic that determines the state of the fault latch. to avoid tripping the breaker due to load capacitance during initial power up a higher threshold is used. the amplifier will detect if the drop across the sense resistor reaches 166 mv and discharge the gate of the mosfet if detected. once the load voltage approaches the input potential the threshold is lowered to 70 mv. this allows for capacitive load charging and continuous current sensing without the use of a fixed sense blanking timer where excessive currents may develop glitching the input bus prior to breaking. vc voltage regulator and mosfet drive: the biasing scheme in the pi2061 uniquely enables the gate control relative to sgnd and pgnd pins via the resistor r pg shown in figure 1 . the vc input provides power to the control circuitry, the charge pump and the gate driver. an internal regulator clamps the vc voltage to 11.7v with respect to sgnd. the vc pin is connected through an external resistor to the input power source and drain of the mosfet. vc switches over to the load potential once the gate drive is enabled and over current condition is not present. the internal regulator circuit has a comparator to monitor vc voltage and pulls the gate low when vc to sgnd is lower than the vc under-voltage threshold. a s shown in figure 1 the lower bias resistor, r pg is placed between the sgnd connection and the system ground. gate driver: the pi2061 has an integrated charge pump that approximately doubles the regulated vc with respect to sgnd enhancing the n-channel mosfet gate to source voltage. the internal gate driver controls the n-channel mosfet such that in the on state, the gate driver applies current to the mosfet gate driving it to bring the load up to the input voltage and into the r ds (on) condition. when an over current condition is sensed the gate driver pulls the gate low to pgnd and discharges the mosfet gate with 4a peak capability. a schottky diode (d1 in figure 1 ) from pg nd to the mosfet source is required to direct the gate high discharge current into the source. the pi2061 applies high gate discharge current for fast mosfet turn off when a fault condition occurs to prevent system disruption. fast mosfet turn off may produce high voltage ringing due to parasitic inductance. to prevent negative peaks at sn from injecting substrate current, schottky diode d2 (from sgnd/pgnd to sn pin as shown in figure 1 ) is required. enable input: (en) this input provides control of the switch state enabling and disabling with low current level signals. the active high feature allows pulling/sinking a low current from this input to disable the breaker. system control can disable the switch and reset the over current latch by pulling this pin to a logic low state. once enabled, the gate pin will charge the mosfet gate to turn the load on. the load voltage will rise, reach the input voltage and the device will sense the current continuously once the por interval has cleared relative to the vc to sgnd potential. the disable control with this input is very fast, turning the switch off in typically 200ns. the response to open during an over current event is typically 120ns and the switch will latch off until reset by bringing this input low or recycling of the input power. fault status: ( ft ) this open collector pin transitions to high resistance after the fault status is delayed for 5s when a n over-current fault or disable signal occurs. when the controller input voltage is in under voltage, (vc - sgnd < 7v) this pin is high resistance as well. when the part is in a normal operating condition and gate driver is enabled this pin is low resistance. in high voltage applications this output must be translated to the system return with external circuitry. leave this pin open if unused. not recommended for new designs
? picor corporation ? picorpower.com pi2061 rev 1.4 page 6 of 16 figure 3 : pi2061 block diagram figure 4 : pi2061 timing diagram , referenced to figure 1 . not recommended for new designs sgnd gate driver gate enable q 6 sp 7 sn set en differential amplifier reset vc 7.15v + - fault latch 3 11.7v + - + - 2x charge pump 4 disable pgnd 1 + - v soth - + -+ 166mv 70mv - + nc 5 gate 2 ft 9 dis delay por d bst 8 10 nc gate vc iout en vin initial power-up disabled over current latched reset vout over current threshold ft latched v oc-thl v oc-thh
? picor corporation ? picorpower.com pi2061 rev 1.4 page 7 of 16 . figure 5 : pi2061 state diagram not recommended for new designs reset latch enable gate v oc-thh ft = low gate low ft : high gate low ft : high v vc-sgnd >7.32v v vc -sgnd < 7.0 v v vc-sgnd < 7 . 0 v v vc-sgnd < 7.32v sp-sn < 70mv ft = low v oc-thl hold gate high sp- sn > 70mv v vc-sgnd < 7.0v pull gate low & latch ft = high sp-sn < 166mv sp-sn > 166mv v vc-sgnd < 7.0v vc-sn < 0.8v vc-sn > 0.8v en=low en=high en=high en=low en=low en=low en=low en=low
? picor corporation ? picorpower.com pi2061 rev 1.4 page 8 of 16 typical characteristics: figure 6 : controller quiescent current vs. temperature. figure 7 : vc under - voltage rising threshold vs. temperature figure 8 : gate source current vs. temperature figure 9 : gate drive voltage to vc vs. temperature. figure 10 : low range overcurrent turn - off time vs. temperature. figure 11 : low range overcurrent threshold vs. temperature. 1.58 1.60 1.62 1.64 1.66 1.68 1.70 1.72 - 50 - 25 0 25 50 75 100 125 150 vc quiescent current [ma] junction temperature [ c] 7.24 7.26 7.28 7.30 7.32 7.34 7.36 - 50 - 25 0 25 50 75 100 125 150 vc uvlo rising threshold [v] junction temperature [ c] - 17 - 16 - 15 - 14 - 13 - 12 - 11 - 50 - 25 0 25 50 75 100 125 150 gate source current [ a] junction temperature [ c] 8.7 8.8 8.9 9.0 9.1 9.2 9.3 - 50 - 25 0 25 50 75 100 125 150 gate drive voltage to vc [v] junction temperature [ c] 118 120 122 124 126 128 130 132 - 50 - 25 0 25 50 75 100 125 150 low range octurn - off time [ns] junction temperature [ c] 68.0 68.5 69.0 69.5 70.0 70.5 71.0 - 50 - 25 0 25 50 75 100 125 150 low overcurrent threshold [mv] junction temperature [ c] v vc - sgnd =10.5v i g =2a i vc =3ma v vc - sgnd =10.5v v g =v g - hi - 1v i vc =3ma v vc - sgnd =10.5v v sp - sn = 0v to 200mv step vc=sn v vc - sgnd =10.5v vc = sn not recommended for new designs
? picor corporation ? picorpower.com pi2061 rev 1.4 page 9 of 16 application information the pi2061 cool-switch is a wide input voltage high side load disconnect switch. this section describes in detail the procedure to follow when designing with the pi2061 load disconnect switch. biasing sequence functionality when vin is applied and the load is at zero volts, the vc capacitor will charge via current flowing through r vc , d1, load resistance and r pg . if the load resistance is much lower than r pg , most of the charge and bias current flows through the load. as vc to sgnd voltage rises above the under-voltage rising threshold (v vcuvr ) while the en pin is high, the controller will charge the mosfet gate and monitor the voltage across the sense resistor (v sp - sn ). as the mosfet turns on, the load voltage (vout) will rise until the mosfet is in r ds(on) and vload=vin. if the voltage across the sense resistor ( ) is higher than the high range overcurrent threshold (v oc -thh 166mv) while the load rises, the gate will be discharged to pgnd and latch off; otherwise vout will keep rising, d1 becomes reverse biased and the controller bias current returns to ground through r pg . when vout reaches the over current range switch over threshold, the over current threshold switches to the low range over current threshold (v oc -thl 70mv). vc will be biased from vout through the sn pin when vout is a diode drop (d bst ) above vc as the load reaches vin. upper and lower bias resistors should be selected to keep pi2061 bias voltage in regulation. upper side bias resistor selection: r vc r vc is placed between vin and vc to limit the current into the clamp under a shorted load condition. this will allow vc to regulate with respect to sgnd/pdnd node when the mosfet is in off condition and sgnd/pgnd node is pulled low via d1 , rs and low load resistance. the r vc resistor can be calculated using the following expression: and r vc maximum power dissipation is: where: : vin minimum voltage (vin to rtn) : vin maximum voltage (vin to rtn) : vc maximum clamp voltage, 12.5v : vc minimum clamp voltage, 11v : vc maximum quiescent current at startup, use 3.0ma : d1 voltage drop, use 0.3v : 0.1ma is added for margin lower side bias resistor selection: rpg r pg is placed between sgnd/pgnd and return to limit the clamp current and allow vc regulation when the mosfet is in the on condition. the r pg resistor can be calculated using the following expression: and r vc maximum power dissipation is: where: : boot strap diode minimum forward voltage, use 0.8v : boot strap diode minimum forward voltage, use 1.0v : vc maximum quiescent current, use 2.1ma r vc and r pg calculation example vin (minimum) = 40v and vin (maximum) = 50v note that in the case of a light load while the pi2061 is disabled, a voltage will appear at vout due to the resistance between the vc pin and the sp and sn pins. the approximate value will be: where: : output load resistance when the load is inactive not recommended for new designs
? picor corporation ? picorpower.com pi2061 rev 1.4 page 10 of 16 schottky diodes selection: d1 and d2 diode d1 (see figure 1 & figure 14 .) must be a low reverse leakage schottky diode capable of supporting 4a of peak gate discharge current for 10ns. diode d2 must be a low reverse leakage schottky diode capable of supporting 1a peak. both diodes will have a reverse voltage of 13v during normal operation. recommended diode for d1 and d2: pmeg4005ej from nxp sense resistor selection: rs in typical load switch application the sense resistor is based on minimum trip current to allow maximum normal load current without interruption. calculate rs value at minimum low range overcurrent threshold voltage (v oc -t hl ): where: : minimum low range overcurrent threshold voltage, 63mv : required minimum trip current enable input circuit: en en pin can be tied directly to vc or left floating if pi2061 should be enabled when the power is applied. if the user wants to control the device enable function, then en pin can be pulled low with a resistor and signal fet, signal transistor or open collector logic as shown in figure 12 . note that the enable control signal phase must be inverted. use an enable resistor (r en ) value between 300k and 400k with voltage rating that meets maximum input voltage. figure 12: enable circuit fault indication: ft ft is an open collector output and its return is referenced to sgnd. when the sgnd pin is floating on a bias resistor (r pg ) or in a constant current circuit, a level shift circuit can be added to create an output referenced to the system ground. see figure 13 . figure 13: ft level shift circuit alternative bias circuit: constant current circuit for high voltage application. in a wide operating input voltage range the size of r vc and r pg may be become large to support power dissipation. a simple constant current circuit, shown in figure 14 can be used instead of r vc and r pg to allow the circuit to operate between 18v and 80 v (100v/100ms transient) with low power dissipation components. please refer to picor application notes for more details on how to design a floating bias with the constant current circuit. figure 14: constant current bias circuit not recommended for new designs vin pgnd sn gate sgnd pi2061 6 1 7 2 sp 4 en 5 rtn vc 3 r pg r s vc vout d2 r vc r en en q en d1 100k 100k 100k ft q2 vin pgnd sn gate sgnd pi2061 1 7 2 4 en 5 rtn vc 3 r pg r s vc vout r vc ft vc q1 6 sp 15k d2 d1 vin pgnd sn gate sgnd pi2061 6 1 7 2 sp 4 en 5 vc 3 r s vout d1 6.8v 50k 1k q1 2.6k 50k q2 6.8v rtn 1f fjv1845 fjv1845 2k pmeg4005ej irf7853pbf m1 10m c vc pmeg4005ej d2
? picor corporation ? picorpower.com pi2061 rev 1.4 page 11 of 16 n-channel mosfet selection: several factors affect mosfet selection including cost and following ratings; on -state resistance (r ds(on) ), dc current, short pulse current, avalanche, power dissipation, thermal conductivity, drain- to -source breakdown voltage ( bv dss ), gate- to -source voltage (v gs ), and gate threshold voltage (v gs (th) ). the first step is to select a suitable mosfet based on the bv dss requirement for the application. the bv dss voltage rating should be higher than the applied vin voltage plus expected transient voltages. stray parasitic inductance in the circuit can also contribute to significant transient voltage condition, particularly during mosfet turn-off after an over current fault has been detected. in a disconnect switch application when the output is shorted, a large current is sourced from the power source through the mosfet. depending on the input impedance of the system, the current may get very high before the mos fet is turned off. make sure that the mosfet pulse current capability can withstand the peak current. also, such high current conditions will store energy even in a small parasitic inductance. the pi2061 has a very fast response time to terminate a fault condition achieving 12 0ns typical and 200 ns maximum. this fast response time will minimize the peak current to keep stored energy and mosfet avalanche energy very low to avoid damage (electrical stress) to the mosfet. peak current during output short is calculated as follows, assuming that the in put power source has very low impedance and it is not a limiting factor: where: : peak current in the mosfet right before it is turned off. : input voltage at mosfet drain before output short condition occurred. : over current turn-off time. this will include pi2061 delay and the mosfet turn off time. : circuit parasitic inductance the mosfet avalanche energy during an input short is calculated as follows: where: : avalanche energy : mosfet breakdown voltage mosfet r ds(on) and maximum steady state power dissipation are closely related. generally the lower the mosfet r ds(on) , the higher the current capability and the lower the resultant power dissipation for a given current . this leads to reduced thermal management overhead, but will ultimately be higher cost compared to higher r ds(on) parts. it is important to understand the primary design goal objectives for the application in order to effectively trade off the performance of one mosfet versus another. power dissipation in load switch circuits is derived from the total drain current and the on-state resistance of the selected mosfet . mosfet power dissipation: where : : mosfet drain current : mosfet on-state resistance note: in the calculation use r ds(on) at maximum mosfet temperature because r ds(on) is temperature dependent. refer to the normalized r ds(on) curves in the mosfet manufacturers datasheet. some mosfet r ds(on) values may increase by 50% at 125c compared to values at 25c. the junction temperature rise is a function of power dissipation and thermal resistance. where: : mosfet junction- to -ambient thermal resistance not recommended for new designs
? picor corporation ? picorpower.com pi2061 rev 1.4 page 12 of 16 typical application example 1: 12v load switch requirement: input bus voltage = 12v (10% , 10.8v to 13.2v) maximum load current = 10a minimum trip current = 12 a maximum ambient temperature = 75c solution: pi2061 with a suitable external mosfet should be used, configured as shown in the circuit schematic in . select a suitable n-channel mosfet: most industry standard mosfets have a v gs rating of +/-12v or higher. select an n-channel mosfet with a low r ds(on) which is capable of supporting the full load current with some margin, so a mosfet capable of at least 18a in steady state is reasonable. an exemplary mosfet having these characteristic is the si4630dy from siliconix. from si4630dy datasheet: ? n-channel mosfet ? v ds = 25 v ? i d = 32 a continuous drain current ? i d (pulse) = 70a pulsed drain current ? v gs ( max )=16v ? r ja = 80c/w under steady state condition ? r ds(on) =2. 2m typical and 2.7m maximum at i d =20a, v gs =10v , t j =25c select sense resistor: rs power dissipation at maximum operating current maximum trip current power dissipation: r ds(on) is 2.7 m maximum at 25c & 10 v gs and will increase as the temperature increases. add 40c to maximum ambient temperature to compensate for the temperature rise due to power dissipation. at 115c (75c + 40c) r ds(on) will increase by 37%. maximum at 1 15 c maximum junction temperature vc bias: vin maximum input is 13.2v, this is higher than the 11v vc minimum clamp voltage (v vc -sgnd ) minimum, but the minimum input voltage is greater than v vc -sgnd minimum. use 3 00 resistor for each r vc and r pg to minimize regulator clamp current. power dissipation of r vc and r pg : both resistors have very low power dissipation, less than 50mw. any package size resistor, 0201 (0603 metric) or larger, can be used. en : tie en pin to vc since enable function is always on. ft: fault function is not required, leave fault pin unconnected. figure 15: pi2061 in 12v bus high side load switch application. not recommended for new designs vin pgnd sn gate sgnd pi2061 6 1 7 2 0.1f sp 4 en 5 rtn vc 3 300 5m vc vout 300 si4630dy r s m1 d1 pmeg4005ej d2 pmeg4005ej
? picor corporation ? picorpower.com pi2061 rev 1.4 page 13 of 16 typical application example 2: requirement: +48v load switch with enable function bus voltage = +48v (+36v to + 55 v) maximum load current = 5a minimum trip current = 6a maximum ambient temperature = 60c solution: pi2061 with a suitable mosfet should be used and configured as shown in figure 16 . select a suitable n-channel mosfet: select a mosfet with voltage rating higher than the input voltage, vin, plus any expected transient voltages, with a low r ds(on) that is capable of supporting the full load current with margin. for instance, a 100v rated mosfet with 10a current capability is suitable. an exemplary mosfet having these characteristic is irf7853pbf from international rectifier. from the irf7853pbf datasheet: n-channel mosfet v ds = 100v i d = 8.3a maximum continuous drain current at 25c i d-pulse = 66a pulsed drain current v gs ( max ) =20v r ja = 50c/w on 1in 2 copper, t 10seconds r ja for continuous operation not provided r ds(on) =14.4m typical at v gs =10v, t j =25c r ds(on) =18m maximum at v gs =10v, t j =25c select sense resistor: rs power dissipation at maximum operating current maximum trip current power dissipation: r ds (on) is 18m maximum at 25c & 10 v gs and will increase as the temperature increases. add 20c to maximum ambient temperature to compensate for the temperature rise due to power dissipation. at 80c (60c + 20c) r ds (on) will increase by 40%. at maximum at 80c maximum junction temperature recalculate maximum r ds(on) at 95c. at 95c r ds(on) will increase by 50%: at maximum at 95c maximum junction temperature after 10s for continuous operation refer the mosfet datasheet for r ja under continuous operation and use in place of 50c/w. vc bias resistors: select 7.5k resistor select 10 k resistor power dissipation of r vc and r pg : recommended schottky: pmeg4005ej from nxp or equivalent not recommended for new designs
? picor corporation ? picorpower.com pi2061 rev 1.4 page 14 of 16 enable input circuit: en pull en pin to ground (return) to disable. this can be accomplished with a signal transistor (q1) in open collector configuration and a pull-up resistor r en . a 5% 36 0k resistor can be used to pull down on en pin. note that the control signal phase is inverted. figure 16: pi2061 in high side +48v application, vc is biased through a bias resistor layout recommendation: use the following general guidelines when designing printed circuit boards. an example of the typical land pattern for the pi2061 is shown in figure 17 . ? use a solid ground (return) plane to reduce circuit parasitics. ? connect rs terminal at sp pin side, d1 cathode and all mosfet source pins together with a wide trace to reduce trace parasitics and to accommodate the high current output. connect rs terminal at sn pin side to the load with a wide trace. also connect all mosfet drain pins together with a wide trace to accommodate the high current input ? kelvin connect sp pin and sn pin to rs terminals. ? the vc bypass capacitor should be located as close as possible to the vc and sgnd pins. place the pi20 61 and vc bypass capacitor on the same layer of the board. the vc pin and c vc pcb trace should not contain any vias. ? dedicate a small copper area on lower layer underneath the controller for pgnd and sgnd to make a single point connection and simplify layou t inter connect. make sure that vin to vout current return path is solid underneath the mosfet (m1) and the sense resistor (r1). ? make sure d1 and d2 connecting traces are very short to reduce parasitic inductance that might produce voltage drop due mosfet fast turn off. ? use 1oz of copper or thicker if possible to reduce trace resistance and power dissipation. figure 17: pi2061 layout recommendation not recommended for new designs vin pgnd sn gate sgnd pi2061 6 1 7 2 0.1f sp 4 en 5 rtn vc 3 10k 10m vc vout d1 7.5k irf7853pbf r s m1 r en en 360k ft pmeg4005ej d2 pmeg4005ej
? picor corporation ? picorpower.com pi2061 rev 1.4 page 15 of 16 package drawings: 10 lead dfn ordering information part number package transport media pi2061 - 00 - qeig 3mm x 3mm 10 lead dfn t&r not recommended for new designs
? picor corporation ? picorpower.com pi2061 rev 1.4 page 16 of 16 warranty vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. this warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. vicor shall not be liable for collateral or consequential damage. this warranty is extended to the original purchaser only. except for the foregoing express warranty, vicor makes no warranty, express or limited, including, but not limited to, the warranty of merchantability or fitness for a particular purpose. vicor will repair or replace defective products in accordance with its own best judgment. for service under this warranty, th e buyer must contact vicor to obtain a return material authorization (rma) number and shipping instructions. products returned without prior authorization will be returned to the buyer. the buyer will pay all charges incurred in returning the product to the factory. vicor will pay all reshipment charges if the product was defective within the terms of this warranty. information published by vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. per vicor terms and conditions of sale, the user of vicor components in life support applications assumes all risks of such use and indemnifies vicor against all damages. vicors comprehensive line of power solutions includes high density ac -dc and dc-dc modules and accessory components, fully configurable ac-dc and dc-dc power supplies, and complete custom power system s. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for it s use. vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunc tion could result in injury or death. all sales are subject to vicors terms and conditions of sale, which are available upon request. specifications are subject to change without notice. vicor corporation picor corporation 25 frontage road 51 industrial drive andover, ma 01810 north smithfield, ri 02896 usa usa customer service: custserv@vicorpower.com technical support: apps@vicorpower.com tel: 800- 735 -6200 fax: 978- 475 -6715 not recommended for new designs

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